2008-09-30  Jonathan Larmour  <jifl@eCosCentric.com>

	* include/var_arch.h (HAL_BREAKINST_THUMB): Needs overriding
	for certain cores as they treat BKPT specially. This override
	used to be in multiple individual platform HALs.

2008-09-13  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/arm9.S (FUNC_START_ARM): Define each function in its own
	differently named section.
	(hal_dcache_invalidate_all): Remove seemingly unnecessary cache
	status read.

2008-06-04  Jonathan Larmour  <jifl@eCosCentric.com>

	* include/hal_cache.h: Include <pkgconf/hal.h> since we use
	config.
	Allow icache and dcache size to be configured for ARM926EJ as
	it appears licensees can vary it (can be overridden via
	<pkgconf/hal.h>).

2007-10-10  Nick Garnett  <nickg@ecoscentric.com>

	* cdl/hal_arm_arm9.cdl: Bring ARM926EJ variant up to date.

2006-08-10  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/arm9.S (hal_dcache_sync_index): Only need to do a clean here,
	not also an invalidate.
	Datasheet says that the register operand when draining the write
	buffer should be zero, so use r2.

2006-02-17  Tom Chase  <tchase@dtccom.com>

	* include/hal_cache.h: Added support for ARM926EJ.  Changed
	ARM925T to use CYGHWR_HAL_ARM_ARM9_ALT_CLEAN_CACHE and defined 
	CYGHWR_HAL_ARM_ARM9_ALT_CLEAN_CACHE to clean the cache manually 
	because CYGHWR_HAL_ARM_ARM9_CLEAN_CACHE did not work for the 
	OMAP1510.

	* cdl/hal_arm_arm9.cdl: Added option for ARM926EJ.

2005-09-15  Nick Garnett  <nickg@ecoscentric.com>

	* include/var_arch.h: 
	* cdl/hal_arm_arm9.cdl:
	Added var_arch.h header to define bus mode functions and to supply
	HAL_IDLE_THREAD_ACTION.

2005-08-15  Nick Garnett  <nickg@ecoscentric.com>

	* src/arm9.S: Added some miscellaneous functions for controlling
	bus mode and to wait for an interrupt.

2005-07-02  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/arm9.S (hal_dcache_disable): Revert below patch. Should
	be addressed in platform HALs.

2005-07-01  Jonathan Larmour  <jifl@eCosCentric.com>

	* src/arm9.S (hal_dcache_disable): This should not also invalidate
	the data cache.

2004-10-25  John Dallaway  <jld@ecoscentric.com>

	* cdl/hal_arm_arm9.cdl: Default to the ARM926E processor.

2004-07-22  John Dallaway  <jld@ecoscentric.com>

	* cdl/hal_arm_arm9.cdl: Default to the ARM92OT processor.

2004-07-16  Nick Garnett  <nickg@ecoscentric.com>

	* src/arm9.S: Removed automatic enable of MMU and alignment
	faults. These don't belong here and should have been set
	elsewhere.

2004-06-14  John Dallaway  <jld@ecoscentric.com>

	* cdl/hal_arm_arm9.cdl: Set CYGSEM_HAL_ARM_ARM9_MMH default to "MMU".

2004-06-11  Nick Garnett  <nickg@ecoscentric.com>

	* include/hal_cache.h: Added entry for ARM946E.

	* cdl/hal_arm_arm9.cdl: Added ARM946E sub-variant. Added
	CYGSEM_HAL_ARM_ARM9_MMH option to record type of memory
	management/protection hardware present.

	* src/arm9.S: Added ifdefs for the type of memory management
	hardware so that things like TLBs only get flushed when an MMU is
	present.
	
2004-05-10  John Dallaway  <jld@ecoscentric.com>

	* cdl/hal_arm_arm9.cdl: Default to the ARM926E processor.

2004-05-07  Nick Garnett  <nickg@ecoscentric.com>

	* src/arm9.S: New file. To support thumb code in ARM9 based CPUs
	all former inline code sequences have been moved to ARM mode
	functions which must then be called from thumb code using the
	interwork mechanisms.

	* include/hal_cache.h: Added cache dimensions for ARM926E. Changed
	all macros implemented by inline asm to call a function in
	arm9.S. This is to allow thumb code to work.

	* src/arm9_misc.c: Removed implementation of
	cyg_hal_arm9_soft_reset(). This has now moved to arm9.S.

	* cdl/hal_arm_arm9.cdl: Added ARM926E sub-variant. Added THUMB
	architecture support to each sub-variant. Added compile for new
	arm9.S source file.

2004-02-11  John Dallaway  <jld@ecoscentric.com>

	* cdl/hal_arm_arm9.cdl: Default to the ARM920T processor.

2003-01-08  Patrick Doyle  <wpd@delcomsys.com>

	* include/hal_cache.h: Changed HAL_ICACHE_LINE_SIZE and
	HAL_DCACHE_LINE_SIZE to match the documentation from TI.  Now the
	kcache2 test passes the two tests that it runs.

2002-03-06  Nick Garnett  <nickg@redhat.com>

	* include/hal_cache.h: Added support for ARM966E. This does not
	have a cache, so this involved adding support for cacheless ARM9s
	in general.

	* cdl/hal_arm_arm9.cdl: Added option for ARM966E.

2002-01-28  Jesper Skov  <jskov@redhat.com>

	* include/hal_cache.h: Only define HAL_VIRT_TO_PHYS_ADDRESS if it
	isn't already defined. This needs renaming and a cleanup, but this
	quick #ifdef hack fixes a compiler warning.

	* cdl/hal_arm_arm9.cdl: Declare var_io.h.

	* include/var_io.h: Added.

2001-11-16  Jesper Skov  <jskov@redhat.com>

	* src/arm9_misc.c (hal_hardware_init): Don't invalidate caches on
	RAM startup.

2001-11-07  Jesper Skov  <jskov@redhat.com>

	* src/arm9_misc.c (cyg_hal_arm9_soft_reset): Also put CPU in SVC
	mode (as after a reset). Still broken though.

2001-11-06  Gary Thomas  <gthomas@redhat.com>

	* include/hal_cache.h: Add virtual->physical translation setup.

2001-11-01  Jesper Skov  <jskov@redhat.com>

	* src/arm9_misc.c (cyg_hal_arm9_soft_reset): Attempt at soft
	reset. Doesn't quite work though, and it's unclear why.

2001-10-28  Gary Thomas  <gthomas@redhat.com>

	* include/hal_cache.h: Fix DATA cache flush for 920,922.  This was
	off-by-one, leaving part of the cache unflushed.

2001-08-13  Jesper Skov  <jskov@redhat.com>

	* include/hal_cache.h: Support ARM variants 920, 922, 925 and 940.

2001-04-30  Gary Thomas  <gthomas@redhat.com>

	* src/arm9_misc.c (hal_hardware_init): Use CDL configuration to
	decide which caches should be enabled at startup time.

2001-04-26  Gary Thomas  <gthomas@redhat.com>

	* src/arm9_misc.c (hal_hardware_init): Caches just don't seem to work.

	* include/hal_cache.h: Fix cache parameters - 16K x 16K

2001-04-18  Jesper Skov  <jskov@redhat.com>

	* src/arm9_misc.c: Update copyright.
	* include/hal_cache.h: Same.
	* cdl/hal_arm_arm9.cdl: Same.

2001-04-16  Gary Thomas  <gthomas@redhat.com>

	* cdl/hal_arm_arm9.cdl: Add CDL to describe CPU family.

2001-04-03  Jesper Skov  <jskov@redhat.com>

	* src/arm9_misc.c: Removed hal_arm9.h
	* include/hal_cache.h: Same.
	* include/hal_arm9.h: Deleted.

2000-12-04  Hugo Tyson  <hmt@redhat.com>

	* include/hal_cache.h: Consistently ensure that ARM registers used
	in MCR ops to cache-control coprocessors, where the data doesn't
	matter, all actually have data zero ("SBZ") as in the Jaggar book.
	This may well not be necessary, but for the sake of making sure...

2000-11-27  Jesper Skov  <jskov@redhat.com>

	* include/hal_cache.h
	(HAHAL_FLASH_CACHES_ON/HAL_FLASH_CACHES_OFF): Defined.

	* src/arm9_misc.c (hal_hardware_init): Disable caches. Wasted too
	much time on this already.

2000-11-23  Jesper Skov  <jskov@redhat.com>

	* include/hal_cache.h (HAL_DCACHE_SYNC): Wait for cache dirty flag
	to clear.

2000-11-22  Jesper Skov  <jskov@redhat.com>

	* src/arm9_misc.c (hal_hardware_init): Don't disable caches.

2000-11-21  Jesper Skov  <jskov@redhat.com>

	* include/hal_cache.h (HAL_DCACHE_INVALIDATE_ALL): Remove
	writeback buffer flush.

	* cdl/hal_arm_arm9.cdl: Removed clock options.

	* src/arm9_misc.c: Cleaned up, enabled caches.

	* include/hal_cache.h: Enable cache controls, fix invalidate
	macro.

2000-11-15  Jesper Skov  <jskov@redhat.com>

	* src/arm9_misc.c: Disable/clear caches. Removed clock handling.

	* include/hal_cache.h: Changed to match ARM925, but prevent
	enabling. Messes up flash programming.

2000-11-14  Jesper Skov  <jskov@redhat.com>

	* Created.

//===========================================================================
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